W^X - The Mechanism Depends on MMU Architecture: sparc sparc64 alpha amd64 ia64 hppa per-page X bit i386 code segment limit ("line in sand"), or PAE NX powerpc per-segment X bit (per-page on G5) arm soft TLB management on some m88k Split code & data mmu vax m68k mips not possible OpenBSD currently has W^X on: sparc sparc64 alpha amd64 hppa i386 Not implemented: powerpc m88k ia64 We need a few process address space changes to support this...